Thanks to GaAs tunnel junction technology, we offer epi wafers of single-junction and dual-junction InGaP/GaAs solar cells,with different structures of epitaxial layers (AlGaAs,InGaP) grown on GaAs for solar cell application.And now we offer a epi wafer structure with InGaP tunnel junction as follows: AR coating MgF2/ZnS Au Frount contact Au-Ge/Ni/Au n+-GaAs 0.3μm ┏ n+-AlInP 0.03 μm <2×1018cm-3(Si) Window InGaP n+-InGaP 0.05μm 2.0×1018cm-3(Si) n (Eg=1.88eV) p+-InGaP 0.55μm 1.5×1017cm-3(Zn) p top cell p+-InGaP 0.03μm 2.0×1018cm-3(Zn) p+ ┗ p+-AlInP 0.03μm ＜5×1017cm-3(Zn) BSF,diff.barrier Tunnel p+-InGaP 0.015μm 8.0×1018cm-3(Zn) TN(p+) junction n+-InGaP 0.015μm 1.0×1019cm-3(Si) TN(n+) ┏ n+-AlInP 0.05μm 1.0×1019cm-3(Si) Window,diff.barrier GaAs (Eg=1.43 eV) bottom cell n+-GaAs 0.1μm 2.0×1018cm-3(Si) n p -GaAs 3.0μm 1.0×1017cm-3(Zn) p ┗ p+-InGap 0.1μm 2.0×1018cm-3(Zn) BSF p+-GaAs 0.3μm 7.0×1018cm-3(Zn) p+-GaAs substrate ＜1.0×1019cm-3(Zn) substrate Au Back contact Note:LEDs, LASERs and Multi-junction Solar Cells can all employ tunnel junctions to improve performance. Calculating the effects of this junction is tricky, but there are ways to accurately simulate chip characteristics and cost-effectively optimize the structure’s design. Source: semiconductorwafers.net For more information, please visit our website:http://www.semiconductorwafers.net, send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.
We can offer 2" InP/InGaAs/InP epi wafer as follows: InP Substrate: Indium Phosphide wafers, P/E 2"dia×350+/-25um, n-type InP:S (100)+/-0.5°, EDP<1E4/cm2. One-side-polished, back-side matte etched, SEMI Flats. EPI layer : Epi 1: InGaAs:(100) Thickness:100nm, etching stop layer Epi 2: InP:(100) Thickness:50nm, bonding layer Source: semiconductorwafers.net For more information, please visit our website:http://www.semiconductorwafers.net, send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.
We provide wafer of N+ or P+ GaAs epi with AlAs layer on N+ or P+ GaAs substrate as follows: No.1 spec:2-inch p+ GaAs Epi with AlAs layer on p+ GaAs substrate. Structure(from bottom to top): Layer0: 350 um p+ semi-conducting GaAs substrate, >E18 doping, any dopant type Layer1: 300 nm p+ semi-conducting GaAs buffer layer, >E18 doping concentration, any dopant type Layer2: 10 nm AlAs undoped (the AlAs layer must be grown using As2 [dimer] and NOT As4 [tetramer]), Layer3: 2 um p+ semi-conducting GaAs epi layer, >E18 doping concentration, any dopant type No.2 spec: 2-inch n+ GaAs Epi with AlAs layer on n+ GaAs substrate. Structure(from bottom to top): Layer0: 350 um n+ semi-conducting GaAs substrate, Si-doping with >E18 doping Layer1: 300 nm n+ semi-conducting GaAs buffer layer, Si-doping with >E18 doping concentration Layer2: 10 nm AlAs undoped (the AlAs layer must be grown using As2 [dimer] and NOT As4 [tetramer]), Layer3: 2 um n+ semi-conducting GaAs epi layer, Si-doping with >E18 doping concentration No.3 spec: 2-inch GaAs – AlAs two-barrier structure: 1 layer: contact, GaAs, carrier concentration 10e18 cm-3 , 100 nm 2 layer: spacer, GaAs, undoped, 10 nm 3 layer: barrier, AlAs, undoped, 2,3 nm 4 layer: quantum well, GaAs, undoped, 4,5 nm 5 layer: barrier, AlAs, undoped, 2 nm 6 layer: spacer, GaAs, undoped, 40 nm 7 layer: contact, GaAs, carrier concentration 10e18 cm-3 , 500 nm No.4 spec:20nm undoped GaAs/10nm AlAs on GaAs S.I. substrate (No DRAM, no SRAM, no memory chips – wafers only). Anisotropy of the Thermal Conductivity in GaAs/AlAs Superlattices We combine the transient thermal grating and time-domain thermoreflectance techniques to characterize the anisotropic thermal conductivities of GaAs/AlAs superlattices from the same wafer. The transient grating technique is sensitive only to the in-plane thermal conductivity, while time-domain thermoreflectance is sensitive to the thermal conductivity in the cross-plane direction, making them a powerful combination to address the challenges associated with characterizing anisotropic heat conduction in thin films. We compare the experimental results from the GaAs/AlAs superlattices with first-principles calculations and previous measurements of Si/Ge SLs. The measured anisotropy is smaller than that of Si/Ge SLs, consistent with both the mass-mismatch picture of interface scattering and with the results of calculations from density-functional perturbation theory with interface mixing included. Source: semiconductorwafers.net For more information, please visit our website: www.semiconductorwafers.net, send us email at luna@powerwaywafer.com or powerwaymaterial@gmail.com.
We provide InGaAsP/InGaAs epi on InP substrates as follows: 1.Structure: 1.55um InGaAsP QW laser No. Layer Doping 0 InP Substrate S-doped, 2E18/cm-3 1 n-InP buffer 1.0um, 2E18/cm-3 2 1.15Q-InGaAsP waveguide 80nm,undoped 3 1.24Q-InGaAsP waveguide 70nm,undoped 4 4×InGaAsP QW（+1%） 5×InGaAsP Barrier 5nm 10nm PL:1550nm 5 1.24Q-InGaAsP waveguide 70nm,undoped 6 1.15Q-InGaAsP waveguide 80nm,undoped 7 InP space layer 20nm,undoped 8 InP 100nm,5E17 9 InP 1200 nm, 1.5E18 10 InGaAs 100 nm, 2E19 2.Specification: 1) Method: MOCVD 2) Size of wafer: 2” 3) InGaAsP/InGaAs growth on InP substrates 4) 3-5 types of InGaAsP composition 5) PL tolerance of +/- 5nm, PL std. dev. <3nm across the wafer (with an exclusion zone of 5mm from the wafer circumference) 6) PL target range 1500nm. 7) Strain target -1.0% +/- 0.1% (compressive strain) 8) No. of layers: 8-20 9) Total growth thickness: 1.0~3.0um 10) Parameters to be measured: X-Ray Diffraction Measurement (thickness, strain), Photoluminescence Spectrum (PL, PL uniformity), Carrier Concentration Profiling We compare the photocarrier lifetime measured in Br-irradiated InGaAs and cold Fe-implanted InGaAsP. We also demonstrate the possibility of a two-photon absorption (TPA) process in ErAs:GaAs. The lifetime and the TPA were measured with a fiber-based 1550 nm time-resolved differential transmission (∆T) set-up. The InGaAs-based materials show a positive ∆T with sub-picosecond lifetime, whereas ErAs:GaAs shows a negative ∆T consistent with a two-photon absorption process. Source: semiconductorwafers.net For more information, please visit our website:http://www.semiconductorwafers.net, send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.
We can offer 2" InGaAs/InP epi wafer for PIN as follows: InP Substrate: InP Orientation: (100) Doped with Fe, Semi-Insulating wafer Size: 2" diameter Resistivity:>1x10^7)ohm.cm EPD:<1x10^4 /cm^2 Single side polished. EPI layer : InxGa1-xAs Nc>2x10^18 /cc (using Si as dopant), Thickness :0.5 um (+/- 20%) Roughness of epi-layer, Ra<0.5nm Source: semiconductorwafers.net For more information, please visit our website: www.semiconductorwafers.net, send us email at luna@powerwaywafer.com or powerwaymaterial@gmail.com.
We offer GaAs Epitaxial Wafers for Schottky Diode as follows: Epitaxial Structure No. Material Composition Thickness Target(um) Thickness Tol. C/C(cm3) Target C/C Tol. Dopant Carrrier Type 4 GaAs 1 ±10% ＞5.0E18 N/A Si N++ 3 GaAs 0.28 ±10% 2E+17 ±10% Si N 2 Ga1-xAlxAs x=0.50 1 ±10% -- N/A -- -- 1 GaAs 0.05 ±10% -- N/A -- -- Substrate: 2'',3'',4" Millimeter and submillimeter heterodyne observations will improve our understanding of the universe, the solar system and the Earth atmosphere. Schottky diodes are strategical components that can be used to build THz sources or mixers working at room temperature. A GaAs Schottky diode is one of the key elements for multipliers and mixers at THz frequencies since the diode can be extremely fast by reducing its size and also very efficient thanks to the low forward voltage drop. The fabrication process presented below is based on electron beam lithography and conventional epitaxial layer designs. The starting material is a semi-insulating 500µm GaAs substrate with epitaxial layers grown by Metal-Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE). The layer structure consists of a first 400nm of AlGaAs etch-stop layer and a first GaAs 40µm membrane followed by a second 400nm of AlGaAs etch-stop layer and a second GaAs thick membrane. The active parts of the substrates are as followed, 40nm AlGaAs etch-stop layer, an 800nm heavily doped 5x1018cm-3 n+ GaAs layer and a 100nm n type GaAs layer doped 1x1017cm-3. Two different structures for mixers, a 183GHz MMIC mixer (Fig 1-a) and a 330GHz circuit mixer (Fig 1-b) have been designed via CAD systems and fabricated using e-beam lithography. Fig 1: CAD captures of 183GHz MMIC mixer (a) and 330GHz circuit mixer (b). A selective AlGaAs/GaAs wet etching is used to define the device mesas, the etch rate slows down sufficiently when the etch-stop layer is reached. For the ohmic contacts, the n+ GaAs layer is recessed, Ni/Ge/Au metal films are successively evaporated and a rapid thermal annealing is performed. For the air-bridges and Schottky anodes/connection pads, the process is as followed. Firstly, a square of resist is exposed and reflowed to form the support for the air-bridges. The anodes are then fabricated using two layers of resists and the required profile is obtained by the combination of resist layer thicknesses, sensitivities and exposure doses. Finally, Ti/Au metal film is evaporated to make the Schottky contacts and connection pads. The diodes are then passivated using Si3N4 deposited by PECVD (Plasma Enhanced Chemical Vapor Deposition). To allow circuit integration, circuits are separated by a deep dry etching using ICP (Inductive Coupled Plasma) - RIE: 10µm etching for the 330GHz circuit and 50µm etching for the 183GHz MMIC. Finally, the wafer is then mounted topside-down onto a carrier wafer by using wax. The semi-insulating GaAs substrate is thinned to the desired thickness (10µm or 50µm) usin...
LT-GaAs We offer LT-GaAs for THz or detector and other application. 2" LT-GaAs Wafer Specification: Item Specifications Diamater(mm) Ф 50.8mm ± 1mm Thickness 1-2um or 2-3um Marco Defect Density ≤ 5 cm-2 Resistivity(300K) >108 Ohm-cm Carrier ＜0.5ps Dislocation Density <1x106cm-2 Useable Surface Area ≥80% Polishing Single side polished Substrate GaAs substrate Other conditions: 1) GaAs substrate should be undoped/semi-insulating with (100)orientation. 2) Growth temperature: ~ 200-250 C Annealed for ~ 10 minutes at 600 C after growth LT-GaAs Introduction: Low-temperature grown GaAs is the most widely used material for the fabrication of photoconductive THz emitters or detectors. Its unique properties are good carrier mobility, high dark resistivity, and subpicosecond carrier lifetimes. GaAs grown by molecular beam epitaxy (MBE) at temperatures lower than 300 °C (LT GaAs) presents a 1%–2% arsenic excess which depends on the growth temperature Tgand on the arsenic pressure during the deposition. As a result a high density of arsenic antisite defects AsGa is produced and forms a donor miniband close to the center of the band gap. The concentration of AsGa increases with decreasing Tg and can reach 1019–1020 cm-3, which leads to a decrease of the resistivity due to hopping conduction. The concentration of ionized donors AsGa+, which are responsible for the fast electron trapping, depends strongly on the concentration of acceptors (gallium vacancies). The as-grown samples are then usually thermally annealed: The excess arsenic precipitates into metallic clusters surrounded by depleted regions of As/GaAs barriers which allow one to recover the high resistivity. The role of the precipitates in the fast carrier recombination process is, however, not yet completely clear. Recently, attempts have been made also to dope LT GaAs during the MBE growth with compensating acceptors, namely with Be, in order to increase the number of AsGa+ : the trapping time reduction was observed for heavily doped samples. LT-GaAs Test Report: Please click the following to see the LT-GaAs report: http://www.semiconductorwafers.net/uploadfile/downloads/Low%20Temperature%20GaAs%20Experimental%20Results.pdf THz Generation Process in LT-GaAs: Please click the following to see this article: http://www.semiconductorwafers.net/thz-generation-process-in-lt-gaas_n338 Related Products: lt gaas wafer lt-gaas photoconductive switch lt-gaas carrier lifetime lt gaas thz batop lt-gaas Source: semiconductorwafers.net For more information, please visit our website: www.semiconductorwafers.net, send us email at luna@powerwaywafer.com or powerwaymaterial@gmail.com.
PAM-XIAMEN offer InGaN on sapphire, In content in the InGaN layers ranges from 10% to 40 %, attached picture is InGaN template with In content 20%,30%,40%(from left to right),Please see below InGaN picture:
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