Poly-Si crystals are mainly used in solar cells because of their low cost. Here, the zones of sensitivity to wavelengths in sunlight should be expanded to increase the engineering efficiency of solar cells. Group IV compound semiconductors films, e.g., Si (Ge) films doped with C, Ge (C, Si), and/or Sn atoms with contents of several %, on a Si or Ge substrate have been identified as potential solutions to this technical problem. In this study, we calculated the formation energy of each atomic configuration of C, Ge, and Sn atoms in Si by using density functional theory. The "Hakoniwa" method proposed by Kamiyama et al. [Materials Science in Semiconductor Processing, 43, 209 (2016)] was applied to a 64-atom supercell of Si including up to three atoms of C, Ge, and/or Sn (up to 4.56%) in order to obtain the ratio of each atomic configuration and the average value of the Si bandgaps. Not only the conventional generalized gradient approximation (GGA) but also the screened-exchange local-density approximation (sX-LDA) functional was used to obtain more reliable Si bandgaps. The results of the analysis are fourfold. First, two C (Sn) atoms are energetically stable when they are 3rd, 4th, 6th, 7th, and 9th neighbors of each other, while the stability of two Ge atoms is independent of the atomic configuration. Second, C and Ge (Sn) atoms are stable when they are 2nd, 5th, and 8th (1st and 8th) neighbors, while the stability of Sn and Ge atoms is independent of the atomic configuration. Third, the Si bandgap depends (does not depend) on the atomic configuration when Si includes C and/or Sn atoms (Ge atoms). Uniformly mono-doping C by up to 4.68% and Ge (Sn) by up to 3.12% decreased the average value of the Si bandgaps. C doping decreased the Si bandgap the most, while Ge doping decreased it the least. Fourth, uniformly co-doping C and Sn in a 1:1 ratio (C and Ge 1:1, Ge and Sn 1:1) at 1.56% also decreased the Si bandgap. The results shown here will be useful for predicting the bandgap for a given content of Si crystals, which is important for the solar cell application. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
The optical transmission, temperature-dependence of the photoluminescence (PL), and Raman scattering of porous SiC prepared from p-type 6H-SiC are compared with those from bulk p-type 6H-SiC. While the transmission spectrum of bulk SiC at room temperature reveals a relatively sharp edge corresponding to its band gap at 3.03 eV, the transmission edge of porous SiC (PSC) is too wide to determine its band gap. It is believed that this wide edge might be due to surface states in PSC. At room temperature, the PL from PSC is 20 times stronger than that from bulk SiC. The PL PSC spectrum is essentially independent of temperature. The relative intensities of the Raman scattering peaks from PSC are largely independent of the polarization configuration, in contrast to those from bulk SiC, which suggests that the local order is fairly random. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
The optical transmission, temperature-dependence of the photoluminescence (PL), and Raman scattering of porous SiC prepared from p-type 6H-SiC are compared with those from bulk p-type 6H-SiC. While the transmission spectrum of bulk SiC at room temperature reveals a relatively sharp edge corresponding to its band gap at 3.03 eV, the transmission edge of porous SiC (PSC) is too wide to determine its band gap. It is believed that this wide edge might be due to surface states in PSC. At room temperature, the PL from PSC is 20 times stronger than that from bulk SiC. The PL PSC spectrum is essentially independent of temperature. The relative intensities of the Raman scattering peaks from PSC are largely independent of the polarization configuration, in contrast to those from bulk SiC, which suggests that the local order is fairly random. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
1−y alloy as the annealing source.
In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion- cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H+ ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO2 layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO2/Si was obtained with a relatively smooth surface. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
We review our recent efforts on developing HgCdSe infrared materials on GaSb substrates via molecular beam epitaxy (MBE) for fabricating next generation infrared detectors with features of lower production cost and larger focal plane array format size. In order to achieve high-quality HgCdSe epilayers, ZnTe buffer layers are grown before growing HgCdSe, and the study of misfit strain in ZnTe buffer layers shows that the thickness of ZnTe buffer layer needs to be below 300 nm in order to minimize the generation of misfit dislocations. The cut-off wavelength/alloy composition of HgCdSe materials can be varied in a wide range by varying the ratio of Se/Cd beam equivalent pressure during the HgCdSe growth. Growth temperature presents significant impact on the material quality of HgCdSe, and lower growth temperature leads to higher material quality for HgCdSe. Typically, long-wave infrared HgCdSe (x=0.18, cut-off wavelength of at 80 K) presents an electron mobility as high as , a background electron concentration as low as 1.6×1016 cm−3, and a minority carrier lifetime as long as . These values of electron mobility and minority carrier lifetime represent a significant improvement on previous studies of MBE-grown HgCdSe reported in the open literatures, and are comparable to those of counterpart HgCdTe materials grown on lattice-matched CdZnTe substrates. These results indicate that HgCdSe grown at the University of Western Australia, especially long-wave infrared can meet the basic material quality requirements for making high performance infrared detectors although further effort is required to control the background electron concentration to below 1015 cm−3. More importantly, even higher quality HgCdSe materials on GaSb are expected by further optimizing the growth conditions, using higher purity Se source material, and implementing post-growth thermal annealing and defect/impurity gettering/filtering. Our results demonstrate the great potential of HgCdSe infrared materials grown on GaSb substrates for fabricating next generation infrared detectors with features of lower cost and larger array format size. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
Wet etching is an important step in the manufacturing of semiconductor and solar wafers and for the production of MEMS devices. While it has been replaced by the more precise dry etching technology in advanced semiconductor device fabrication, it still plays an important role in the manufacture of the silicon substrate itself. It is also used for providing stress relief and surface texturing of solar wafers in high volume. The technology of wet etching silicon for semiconductor and solar applications will be reviewed. Impact on this step for wafer properties and critical parameters (flatness, topology and surface roughness for semiconductor wafers, surface texture and reflectance for solar wafers) will be presented. The rationale for the use of a etching technology and etchant for specific applications in semiconductor and solar wafer manufacturing will be presented. Source:IOPscience For more information, please visit our website: www.semiconductorwafers.net, send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com
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